1. Field of the Invention
The invention relates to a series/parallel/series shift register memory comprising a substrate on which there are provided storage positions for the storage of data elements each of which is represented by a multivalent, single physical quantity in that storage position, said shift register memory also comprising a serial data input for electric signals, a converter for converting an electric signal received into a data element representation, a serial input register which is connected to the converter and which comprises n&gt;1 first switch positions, a number of storage registers, each of which is connected to a respective first switch position, and a serial output register which is connected to the storage registers via respective second switch positions and which comprises a serial data output, said shift register memory also comprising a transfer control device which, after the formation of n data representations in the input register, transfers these data representations in parallel to the storage registers in a recurrent manner and which also presents an equal number of data representations from the storage registers to the output register, said transfer control device otherwise activating only the input/output registers, said shift register memory also comprising a redundancy generator for forming, on the basis of the reception of p&lt;n data elements, at least one additional, redundant code element to be included in a series of said n data representations.
2. Description of the Prior Art
Two categories of such shift register memories are known. According to U.S. Pat. No. 4,155,121 the physical quantity is an electric charge in an integrated capacitor. This charge is advanced in steps by electric driving; these are so-called charge-coupled devices which form a sub-category of charge transfer devices. Such devices can be used for bivalent data, for data having a finite number of values larger than two, or for analog data. According to U.S. Pat. No. 4,073,012 the physical quantity is a local magnetization in a ferromagnetic material, that is to say a magnetic bubble. The magnetic bubbles can be driven by a magnetic field which rotates in the plane of the substrate, by the energizing of current conductors provided on the substrate, or in a different manner. Faults occur during the manufacture of such memories usually in the comparatively large surface area covered by the storage registers. The yield of the manufacturing process can be increased by way of redundant storage registers, for example registers which are used instead of one or more faulty storage registers. The detection of faulty storage registers may be performed, for example, as a final test during manufacture. During the later use of the shift register memory a given data correction can then be performed by way of one or more redundant code bits which are added to a group of data bits and which can be substituted, for an associated data bit. The detection of faulty storage registers may also be performed during operation, for example as described a copending U.S. patent application which is being filed simultaneously herewith and based on Netherlands patent application 8202364 assigned to the assignee of this application, which has been filed on the same day as the present application and which is incorporated herein by way of reference.